school

UM E-Theses Collection (澳門大學電子學位論文庫)

Title

CMOS clock generator and VCSEL driver for high-speed wireline communications

Issue date

2025.

Author

Yang, Jian,

Faculty
Faculty of Science and Technology
Department
Department of Electrical and Computer Engineering (former name: Department of Electrical and Electronics Engineering)
Degree

Ph.D.

Subject

Electrical engineering

Supervisor

Yin Jun

Pan Quan

Mak Pui-In

Location
1/F Zone C
Library URL
991010456879606306