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UM E-Theses Collection (澳門大學電子學位論文庫)
- Title
-
Advanced architecture alternatives for time-interleaved delta-sigma modulators
- Issue date
-
2021.
- Author
-
Jiang, Dong Yang
- Faculty
-
Faculty of Science and Technology
- Department
-
Department of Electrical and Computer Engineering
- Degree
-
Ph.D.
- Subject
-
Analog-to-digital converter
Modulators (Electronics)
- Supervisor
-
Sin, Sai-Weng
- Files In This Item
- Location
- 1/F Zone C
- Library URL
- 991010021088506306
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